For a Mathematician, a number starts existing with writing it down.

For a Computer Scientist, this involves at least a name, for the variable (or constant).
It may include memory allocation.
Rarely it includes the actual maschine code to program the memory access.

For an Electrical Engineer though, it involves data being processed in a couple of transistors forming a logic gate.
These transistors have a physical location A and the data will travel to a physical location B for further processing.

We're a small team, spanning knowledge from the logic gate level up to the nuts and bolts of machine learning.
For us, a serial data stream between A and B should be pre-processed "en passant", to reduce processing time and energy consumption of the processing units (in C).
Loosely Based on radix trie structures we develop hardware building blocks to compress and process data on the bit-level - while applying domain-specific constraints on meta-levels.

Our current project status encompasses 
•    a hardware showcase for dealing with sparse data, the 
•    "zero terminator", where we re-arrange the calculations of matrix multiplication to enable a processing pipeline for sparse data. 
•    Our experimental data shows a linear dependency between matrix sparsity and processing time up to 80% without any preprocessing requirements. 
•    and a hardware implementation of our dynamic trie processing solution 
Both showcase implementations are in an AMD Xilinx FPGA
IP patent-pending